/* ------------------------------------------------------------------------*
 *
 * ------------------------------------------------------------------------*/
#define _PERIPHERAL_MODULE_
#include "peripheral.h"
#include "gd32f10x_conf.h"

/*****************************************************************************//*!
* @brief   	AdcInit  init .
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/

void AdcRegularInit(void)
{
	
	/* Configure the GPIO ports 
    GPIO_InitPara  GPIO_InitStructure;
	DMA_InitPara DMA_InitStructure;
	
	RCC_ADCCLKConfig( RCC_ADCCLK_APB2_DIV8);
	RCC_APB2PeriphClock_Enable(RCC_APB2PERIPH_ADC1, ENABLE);
	RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_ADC1RST,ENABLE);
	RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_ADC1RST,DISABLE);
	RCC_AHBPeriphClock_Enable(RCC_AHBPERIPH_DMA1,ENABLE);	

	ADC_Enable(DISABLE);
	ADC_DMA_Enable(DISABLE);
	
    // Configure adc pin 
    GPIO_InitStructure.GPIO_Pin     = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
    GPIO_InitStructure.GPIO_Mode    = GPIO_MODE_AN;
    GPIO_InitStructure.GPIO_Speed   = GPIO_SPEED_10MHZ;
    GPIO_InitStructure.GPIO_OType   = GPIO_OTYPE_PP;
    GPIO_InitStructure.GPIO_PuPd    = GPIO_PUPD_NOPULL;
    GPIO_Init(GPIOA , &GPIO_InitStructure);
	
	ADC1->CTLR1 =   ADC_CTLR1_SM;                                 //scan disable
	
	ADC1->CTLR2 =	ADC_CTLR2_TSVREN |                            //senner channel enable
					ADC_CTLR2_VBATEN |                            //batter voltage channel enable
					ADC_CTLR2_CTN   |                             //one by one enable
					ADC_CTLR2_ETSIC |                             //inserted software-trigger
					ADC_CTLR2_ETSRC |                             //regular software-trigger
					ADC_CTLR2_ETERC ;                             //regular trigger enable
	//
	ADC1->SPT1  =   (0x07UL << 24) |                              //SPT18
					(0x07UL << 21) |                              //SPT17
					(0x07UL << 18) |                              //SPT16
					(0x03UL << 15) |                              //SPT15
					(0x03UL << 12) |                              //SPT14
					(0x03UL << 9 ) |                              //SPT13
					(0x03UL << 6 ) |                              //SPT12
					(0x03UL << 3 ) |                              //SPT11
					(0x03UL << 0 ) ;                              //SPT10
	ADC1->SPT2  =   (0x03UL << 27) |                              //SPT9
					(0x03UL << 24) |                              //SPT8
					(0x03UL << 21) |                              //SPT7
					(0x03UL << 18) |                              //SPT6
					(0x03UL << 15) |                              //SPT5
					(0x03UL << 12) |                              //SPT4
					(0x03UL << 9 ) |                              //SPT3
					(0x03UL << 6 ) |                              //SPT2
					(0x03UL << 3 ) |                              //SPT1
					(0x03UL << 0 ) ;                              //SPT0

	
	//watch dog
	ADC1->AWHT  = 0x0FFF;
	ADC1->AWLT  = 0x0000;
	//regular reg config
	ADC1->RSQ1  =   (0x04UL << 20) |                              //RL
					(0x00UL << 15) |                              //RSQ 16
					(0x00UL << 10) |                              //RSQ 15
					(0x00UL << 5)  |                              //RSQ 14
					(0x00UL << 0)  ;                              //RSQ 13
	ADC1->RSQ2  =   (0x00UL << 25) |                              //RSQ 12
					(0x00UL << 20) |                              //RSQ 11
					(0x00UL << 15) |                              //RSQ 10
					(0x00UL << 10) |                              //RSQ 9
					(0x00UL << 5)  |                              //RSQ 8
					(0x00UL << 0)  ;                              //RSQ 7	
	ADC1->RSQ3  =   (0x00UL << 25) |                              //RSQ 6
					(0x11UL << 20) |                              //RSQ 5
					(0x10UL << 15) |                              //RSQ 4
					(0x06UL << 10) |                              //RSQ 3
					(0x05UL << 5)  |                              //RSQ 2
					(0x04UL << 0)  ;                              //RSQ 1	
	
	//-------------- DMA for adc init ----------------------------//
    //Configure DMA1 channel1
    DMA_DeInit(DMA1_CHANNEL1);
    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(ADC1->RDTR));         //Peripheral data address
    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(&AdcResault[0]);            //Memory data address
    DMA_InitStructure.DMA_DIR = DMA_DIR_PERIPHERALSRC;                            //Peripheral to memory
    DMA_InitStructure.DMA_BufferSize = 15;                                        //buffer size
    DMA_InitStructure.DMA_PeripheralInc = DMA_PERIPHERALINC_DISABLE;              //peripheral address inc disable
    DMA_InitStructure.DMA_MemoryInc = DMA_MEMORYINC_ENABLE;                       //peripheral address inc enable           
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PERIPHERALDATASIZE_HALFWORD;   //peripheral data size -- halfword
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MEMORYDATASIZE_HALFWORD;           //Memory data size -- halfword
    DMA_InitStructure.DMA_Mode = DMA_MODE_CIRCULAR;                                 //cycle mode disable(DMA_MODE_NORMAL) / enable(DMA_MODE_CIRCULAR)
    DMA_InitStructure.DMA_Priority = DMA_PRIORITY_HIGH;                           //priority
    DMA_InitStructure.DMA_MTOM = DMA_MEMTOMEM_DISABLE;                            //mem to mem disable
    DMA_Init(DMA1_CHANNEL1, &DMA_InitStructure);                                  //init
    // Enable DMA1 channel1
    DMA_Enable(DMA1_CHANNEL1, ENABLE);	                                          //enable dma
	//--------------   DMA init end ------------------------------//
	
	ADC_Enable(ENABLE);
	ADC_DMA_Enable(ENABLE);
	*/
}

/*****************************************************************************//*!
* @brief   	touch modle check .
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/

void AdcInsertedInit(void)
{
	/*
	// Configure the GPIO ports
    GPIO_InitPara  GPIO_InitStructure;
	
	RCC_ADCCLKConfig( RCC_ADCCLK_APB2_DIV8);
	RCC_APB2PeriphClock_Enable(RCC_APB2PERIPH_ADC1, ENABLE);
	RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_ADC1RST,ENABLE);
	RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_ADC1RST,DISABLE);
	
    // Configure adc pin 
    GPIO_InitStructure.GPIO_Pin     = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
    GPIO_InitStructure.GPIO_Mode    = GPIO_MODE_AN;
    GPIO_InitStructure.GPIO_Speed   = GPIO_SPEED_10MHZ;
    GPIO_InitStructure.GPIO_OType   = GPIO_OTYPE_PP;
    GPIO_InitStructure.GPIO_PuPd    = GPIO_PUPD_NOPULL;
    GPIO_Init(GPIOA , &GPIO_InitStructure);
	//
	ADC1->CTLR1 = 0;
	
	ADC1->CTLR2 = 	ADC_CTLR2_ADCON |                            //enable adc module
					ADC_CTLR2_ETSIC |                            //inserted software-trigger
					ADC_CTLR2_ETSRC |                            //regular software-trigger
					ADC_CTLR2_ETEIC ;                            //inserted trigger enable
	
	//inserted resault offset
	ADC1->ICOS1 = 0;
	ADC1->ICOS2 = 0;
	ADC1->ICOS3 = 0;
	ADC1->ICOS4 = 0;
	//
	ADC1->SPT1  =   (0x07UL << 24) |                              //SPT18
					(0x07UL << 21) |                              //SPT17
					(0x03UL << 18) |                              //SPT16
					(0x03UL << 15) |                              //SPT15
					(0x03UL << 12) |                              //SPT14
					(0x03UL << 9 ) |                              //SPT13
					(0x03UL << 6 ) |                              //SPT12
					(0x03UL << 3 ) |                              //SPT11
					(0x03UL << 0 ) ;                              //SPT10
	ADC1->SPT2  =   (0x03UL << 27) |                              //SPT9
					(0x03UL << 24) |                              //SPT8
					(0x03UL << 21) |                              //SPT7
					(0x03UL << 18) |                              //SPT6
					(0x03UL << 15) |                              //SPT5
					(0x03UL << 12) |                              //SPT4
					(0x03UL << 9 ) |                              //SPT3
					(0x03UL << 6 ) |                              //SPT2
					(0x03UL << 3 ) |                              //SPT1
					(0x03UL << 0 ) ;                              //SPT0
	//watch dog
	ADC1->AWHT  = 0x0FFF;
	ADC1->AWLT  = 0x0000;	
	//inserted reg config
	ADC1->ISQ   =   (0x00UL << 20) |                              //RL
					(0x06UL << 15) |                              //iSQ 4
					(0x05UL << 10) |                              //iSQ 3
					(0x04UL << 5)  |                              //iSQ 2
					(0x04UL << 0)  ;                              //iSQ 1	
					
	//
	ADC_Calibration();
	*/
}

